Volume number53号 2021年3月
CPU作成実験におけ...

CPU作成実験における効率的な回路デバッグ環境の構築

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CPU作成実験における効率的な回路デバッグ環境の構築

Call No. (NDL)
Z14-410
Bibliographic ID of National Diet Library
031822122
Material type
記事
Author
西村 美紀子ほか
Publisher
津幡町 (石川県) : 石川工業高等専門学校
Publication date
2021-03
Material Format
Paper
Journal name
石川工業高等専門学校紀要 = Memoirs of National Institute of Technology, Ishikawa College / 石川工業高等専門学校 編 (53):2021.3
Publication Page
p.17-22
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Material Type
記事
Author/Editor
西村 美紀子
尾山 敬典
松本 剛史
Alternative Title
Development of an Environment to Efficiently Debug Small CPU Circuits Implemented on Breadboard in Student Experiments
Periodical title
石川工業高等専門学校紀要 = Memoirs of National Institute of Technology, Ishikawa College / 石川工業高等専門学校 編
No. or year of volume/issue
(53):2021.3
Issue
53
Pages
17-22
Publication date of volume/issue (W3CDTF)
2021-03